URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 636

Rev	Log message	Author	Age	Path
636	Fixed combinational loops.	lampret	8180d 20h	/
635	Fixed Makefile bug.	ivang	8180d 22h	/
634	configure.in : fixed to build start/Makefile start.S : l.jalr r9 -> l.jr r9 Added missing files.	ivang	8181d 23h	/
633	Bug fix in command line parser.	ivang	8182d 00h	/
632	profiler and mprofiler merged into sim.	ivang	8182d 19h	/
631	Real cache access is simulated now.	simons	8183d 18h	/
630	some bug fixes in store buffer analysis	markom	8184d 03h	/
629	typo fixed	markom	8184d 06h	/
628	This commit was manufactured by cvs2svn to create tag 'pre-GNU-merge'.		8184d 07h	/
627	or32 restored	markom	8184d 07h	/
626	store buffer added	markom	8184d 07h	/
625	Bus error bug fixed. Cache routines added.	simons	8184d 23h	/
624	Added logging of writes/read to/from SPR registers.	ivang	8184d 23h	/
623	update based on recent changes; arithmetic instructions does not modify carry yet	markom	8185d 01h	/
622	Cache test works on hardware.	simons	8185d 04h	/
621	Cache test works on hardware.	simons	8185d 06h	/
620	use ARITH_SET_FLAG to turn off set flag by arith. instructions	markom	8185d 06h	/
619	all test pass, after newest changes	markom	8185d 06h	/
618	Fixed display of new 'void' nop insns.	lampret	8185d 15h	/
617	Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways.	lampret	8185d 15h	/