OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 883

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
883 cuc updated, cuc prompt parsing; CSM analysis markom 8013d 08h /
882 Routine for adjusting read and write delay for devices added. simons 8015d 11h /
881 Normally uart rx and tx files should be in the current folder. mohor 8016d 04h /
880 Library should not be erased during clean. mohor 8016d 05h /
879 Initial version of OpenRISC Custom Unit Compiler added markom 8018d 07h /
878 first release of atabug rherveille 8020d 01h /
877 ata beta release rherveille 8020d 01h /
876 Beta release of ATA simulation rherveille 8020d 01h /
875 libgcc is moved here to avoid the mess with the folders. simons 8020d 13h /
874 Command for displaying trace buffer added. simons 8028d 08h /
873 There is a problem with CRC generation, it has to be fixed in the future. simons 8039d 13h /
872 Touch screen test added. simons 8043d 13h /
871 Generic flip-flop based memory macro for register file. lampret 8044d 07h /
870 Added defines for enabling generic FF based memory macro for register file. lampret 8044d 07h /
869 Added generic flip-flop based memory macro instantiation. lampret 8044d 07h /
868 help added for mprofiler and profiler commands markom 8047d 17h /
867 ifdefs changed to ifs, to exclude ethernet_i header file markom 8049d 18h /
866 after make headers markom 8053d 13h /
865 true flase bug fixed markom 8055d 08h /
864 Change the order of biulding tools. simons 8056d 06h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.