OpenCores
URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] - Rev 116

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
116 Corrected bug when writing to FIFO (now it is registered). tadejm 7605d 03h /
115 Added signals for WB Master B3. tadejm 7605d 03h /
114 This commit was manufactured by cvs2svn to create tag 'rel_7'. 7612d 06h /
113 ifdefs moved to thier own lines, this confuses some of the tools. simons 7612d 06h /
112 This commit was manufactured by cvs2svn to create tag 'rel_6'. 7612d 10h /
111 synchronizer_flop replaced with pci_synchronizer_flop, artisan ram instance updated. simons 7612d 10h /
110 Module that converts slave WISHBONE B3 accesses to
WISHBONE B2 accesses with CAB.		 mihad 7614d 10h /
109 There was missing path to hdl.var file. tadejm 7618d 07h /
108 Added 'three_left_out' to pci_pciw_fifo signaling three locations before full. Added comparison between current registered cbe and next unregistered cbe to signal wb_master whether it is allowed to performe burst or not. Due to this, I needed 'three_left_out' so that writing to pci_pciw_fifo can be registered, otherwise timing problems would occure. tadejm 7618d 07h /
107 Added status when checking disconnect with or without data. Before it was only retry, now there is stop and retry. tadejm 7618d 07h /
106 Added limited WISHBONE B3 support for WISHBONE Slave Unit.
Doesn't support full speed bursts yet.		 mihad 7623d 05h /
105 Wrong pci_bridge32.v file included in the project! mihad 7628d 13h /
104 Found and simulated the problem in the synchronization logic.
Repaired the synchronization logic in the FIFOs.		 mihad 7628d 15h /
103 Added test application and modified files to support it. mihad 7675d 12h /
102 Cleanup! mihad 7675d 13h /
101 Added simulation files. mihad 7675d 13h /
100 Cleanup! mihad 7675d 13h /
99 Cleanup! mihad 7675d 13h /
98 Cleanup. mihad 7675d 13h /
97 Doing a little bit of cleanup. mihad 7675d 13h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.