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Rev Log message Author Age Path
151 Previous Work to generate test benching jguarin2002 4564d 01h /
150 First Beta of RayTrac for a total size of 3874 lcells. Great Result\! jguarin2002 4577d 22h /
149 Results Queue writing signals set on a single standard logic vector rather than in individual bits jguarin2002 4578d 02h /
148 Added an extra stage for the C.D DataPath so it takes the same ammount of clocks to calculate as A.B jguarin2002 4578d 02h /
147 Added Interruption Machine, supporting Result Queue Full and End Of Instruction event notifications. Memblock Adjustments. In the Data Path Control circuit an Interrupt pero Instruction type was decodified. jguarin2002 4580d 14h /
146 Interruption Machine jguarin2002 4588d 08h /
145 State machine and counters finishedifconfigifconfigifconfig! Now gather components to obtain RAYTRACifconfigifconfig jguarin2002 4592d 22h /
144 The commented part of DPC was erased, and no longer needed. jguarin2002 4600d 01h /
143 working on result queue sync decoding signals jguarin2002 4604d 17h /
142 Additions for the State Machine jguarin2002 4609d 16h /
141 Syncing: its awful work: input adresses decoded to include the instructions queue also.... jguarin2002 4676d 17h /
140 Syncing: its awful work..... jguarin2002 4676d 23h /
139 Sync jguarin2002 4688d 13h /
138 enabled ena on memblock and dpc, also changed the instruction and result memories to queued schemes jguarin2002 4693d 05h /
137 Syncing with enables and eleminated all the register outputs since none block should carry on a register output jguarin2002 4699d 05h /
136 gogogo jguarin2002 4701d 16h /
135 Correction on conectiveness of Datapath Control... jguarin2002 4705d 17h /
134 State Machine, for addressing counting, internal writing & reading control and interruption generation jguarin2002 4707d 13h /
133 Added the instructions queue jguarin2002 4709d 04h /
132 There was amiss in the cross product datapath decoder jguarin2002 4713d 00h /

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