URL https://opencores.org/ocsvn/raytrac/raytrac/trunk

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Rev	Log message	Author	Age	Path
249	Using a register as a 66.5 MHZ timer counter	jguarin2002	4280d 21h	/
248	Corrected an error on the normal	jguarin2002	4289d 03h	/
247	Advance in application... but some normalization problems had popped up	jguarin2002	4289d 18h	/
246	framework for conditional and accumulative operations DESCRIBED NOT IMPLEMENTED	jguarin2002	4296d 06h	/
245	Avances pequenos en los documentos	jguarin2002	4309d 02h	/
244	Changed the directory structure a little bit, there is now wide arith (which encapsulates in a single RTL 3 adders or 3 adders	jguarin2002	4312d 00h	/
243	The Registers BASE+1, BASE+2, BASE+3 are used now for debugging purposes	jguarin2002	4312d 00h	/
242	AS1 produced an unnoticed delay, the compiler geenerated an extra stage..... so a delay constant was added to sync this extra stage with the operation via ssync_chain	jguarin2002	4312d 00h	/
241	fmul32 x 6 multipliers wide	jguarin2002	4312d 20h	/
240	last minute correction	jguarin2002	4313d 00h	/
239	wide multiplicator added to avoid optimization	jguarin2002	4313d 00h	/
238	wide multiplicator added to avoid optimization	jguarin2002	4313d 00h	/
237	corrected errors in raytrac.vhd	jguarin2002	4313d 02h	/
236	Tunnning delay added to q0 queue	jguarin2002	4313d 05h	/
235	Tunnning delay added to q0 queue	jguarin2002	4313d 05h	/
234	raytrac update nothing major	jguarin2002	4314d 05h	/
233	raytrac sopc component updated	jguarin2002	4314d 05h	/
232	raytrac sopc component updated	jguarin2002	4314d 05h	/
231	nfetch address counter implemented in a whole register for convinience	jguarin2002	4314d 06h	/
230	RC 1.0 Previous rev(228), is functional and even more than this one, but is bigger and is for debugging	jguarin2002	4319d 08h	/

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[/] - Rev 249

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