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Rev Log message Author Age Path
60 Shifter circuit for Division Phase one done jguarin2002 4872d 05h /
59 Tarde con pintiti, paquete aritmetico se anade raiz shifter y sqrt jguarin2002 4875d 11h /
58 Testbenching corrections..... jguarin2002 4885d 07h /
57 testbench verification AWFUL HORRIBLE BAD WRITTEN GREMLIN PROGRAM jguarin2002 4886d 06h /
56 Stop conditions..... jguarin2002 4893d 11h /
55 Unifying Testbench written files format...... jguarin2002 4893d 12h /
54 Unifying Testbench written files format...... jguarin2002 4893d 14h /
53 Improved TRACE_rom_contents.csv presentation jguarin2002 4900d 22h /
52 Working...... jguarin2002 4921d 22h /
51 There's now a descent testbench 2.0\!\!\! jguarin2002 4928d 22h /
50 There's now a descent testbench\!\!\! jguarin2002 4930d 03h /
49 Test bench ifs finally running jguarin2002 4930d 22h /
48 Developing first testbench.... also learning how to do it jguarin2002 4932d 18h /
47 Started making tests, but dont understand quite well the mechanics of Modelsim. Change Arithpack for quicker multiplier and memory instantiation jguarin2002 4934d 06h /
46 simplified memory path jguarin2002 4934d 09h /
45 Magic is already written... now we shall set the testbench on fire\! jguarin2002 4935d 21h /
44 All components in the test bench are now instantiated what is left now is the magic, menaing the test algorithm... also rom memories with crash test dummies are addedsvn add memax.mif memay.mif memaz.mif membx.mif memby.mif membz.mif memcx.mif memcy.mif memcz.mif memdx.mif memdy.mif memdz.mifsvn add memax.mif memay.mif memaz.mif membx.mif memby.mif membz.mif memcx.mif memcy.mif memcz.mif memdx.mif memdy.mif memdz.mif... jguarin2002 4936d 22h /
43 Nothing to say, just working on the Test Bench... jguarin2002 4937d 06h /
42 no comment no tb yet: jguarin2002 4937d 23h /
41 Ram for the massses\!\!\! jguarin2002 4940d 10h /

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