URL https://opencores.org/ocsvn/rio/rio/trunk

Subversion Repositories rio

[/] - Rev 18

Rev	Log message	Author	Age	Path
18	Making RioSerial entity the same as before+minor fixes.	magro732	3961d 04h	/
17	Removing latch and improving timing.	magro732	3962d 05h	/
16	Removed FIFO between RioSerial and PCS. Transmitter works without idle ticks. Internal symbol fifo increased. Changed readContentEnd_o timing.	magro732	3962d 06h	/
15	All testcases are ok. Still needs some tweeks though.	magro732	3966d 06h	/
14	Most issues solved, testbench issues remains.	magro732	3969d 05h	/
13	Timeouts are working.	magro732	3972d 06h	/
12	Backup of recent work, debugging new RioSerial.	magro732	3983d 05h	/
11	Receiver ready, transmitter is compiling.	magro732	3983d 06h	/
10	Branch to develop support for parallel symbols.	magro732	3983d 06h	/
9	Adding the recently written PCS code, which connects the RioSerial to the Virtex-6 GTX-Quad (4-Lane SerDes)	azdem	4024d 17h	/
8	Adding signal descriptions in comments.	magro732	4068d 07h	/
7	Adding missing generic parameters to RioPacketBuffer.	magro732	4155d 10h	/
6	Adding RioWbBridge. Sorry, no testbench for this one.	magro732	4155d 12h	/
5	Uploading primitive documentation.	magro732	4162d 05h	/
4	Adding protocol engine implementing the hardware independent parts of the LP-serial physical specification.	magro732	4184d 18h	/
3	Adding RioPacketBuffer and testbench.	magro732	4185d 10h	/
2	Adding RioSwitch and testbench.	magro732	4185d 12h	/
1	The project and the structure was created	root	4186d 18h	/