URL https://opencores.org/ocsvn/rio/rio/trunk

Subversion Repositories rio

[/] - Rev 24

Rev	Log message	Author	Age	Path
24	Changing errornous use statement.	magro732	3784d 02h	/
23	Tagging alpha release 2.0.0.	magro732	3900d 19h	/
22	Tagging release 1.0.0.	magro732	3900d 20h	/
21	Branching of a single symbol version of the new RioSerial.	magro732	3900d 20h	/
20	Adding software C-stack and matching VHDL modules.	magro732	3965d 22h	/
19	Removing synthesis warnings.	magro732	3990d 22h	/
18	Making RioSerial entity the same as before+minor fixes.	magro732	3991d 20h	/
17	Removing latch and improving timing.	magro732	3992d 21h	/
16	Removed FIFO between RioSerial and PCS. Transmitter works without idle ticks. Internal symbol fifo increased. Changed readContentEnd_o timing.	magro732	3992d 21h	/
15	All testcases are ok. Still needs some tweeks though.	magro732	3996d 22h	/
14	Most issues solved, testbench issues remains.	magro732	3999d 21h	/
13	Timeouts are working.	magro732	4002d 22h	/
12	Backup of recent work, debugging new RioSerial.	magro732	4013d 21h	/
11	Receiver ready, transmitter is compiling.	magro732	4013d 21h	/
10	Branch to develop support for parallel symbols.	magro732	4013d 22h	/
9	Adding the recently written PCS code, which connects the RioSerial to the Virtex-6 GTX-Quad (4-Lane SerDes)	azdem	4055d 09h	/
8	Adding signal descriptions in comments.	magro732	4098d 22h	/
7	Adding missing generic parameters to RioPacketBuffer.	magro732	4186d 02h	/
6	Adding RioWbBridge. Sorry, no testbench for this one.	magro732	4186d 04h	/
5	Uploading primitive documentation.	magro732	4192d 20h	/