URL https://opencores.org/ocsvn/s1_core/s1_core/trunk

Subversion Repositories s1_core

[/] - Rev 65

Rev	Log message	Author	Age	Path
65	Version with undisclosed library names	fafa1971	6091d 12h	/
64	Initial version B C C Initial versioNCVS: ----------------------------------------------------------------------	fafa1971	6091d 12h	/
63	* empty log message *	fafa1971	6091d 13h	/
62	Documentation files updated to reflect the 3 different flavors of S1 Core	fafa1971	6137d 11h	/
61	Updated to latest version	fafa1971	6137d 11h	/
60	Now supports also Virtex5 devices	fafa1971	6137d 11h	/
59	Now it is just one line	fafa1971	6137d 11h	/
58	These were only symbolic links to remember where such these things were defined	fafa1971	6137d 11h	/
57	Latest version	fafa1971	6137d 11h	/
56	Updated from OpenSPARC T1 version 1.4 to version 1.5	fafa1971	6137d 11h	/
55	Nobody remembers why these blackboxed files were required!	fafa1971	6137d 11h	/
54	Updated filelists	fafa1971	6137d 11h	/
53	Removed from CVS tree because header file preprocessing is done elsewhere	fafa1971	6137d 11h	/
52	Updated SPARC Core files from OpenSPARC T1 version 1.4 to version 1.5	fafa1971	6137d 11h	/
51	User Chris "gaterocket" corrected a couple of errors for FPGA boards: blocking assignments and two uninitialized variables.	fafa1971	6223d 11h	/
50	Changed library paths for XST from macrocell to behav.	fafa1971	6239d 18h	/
49	Now supports 3 versions: S1 Core ME/SE/EE.	fafa1971	6246d 19h	/
48	Updated with new OpenSPARC 1.4 list	fafa1971	6288d 10h	/
47	Updated with `define preprocessing for Xilinx XST synthesis	fafa1971	6288d 10h	/
46	Fresh version from OpenSPARC 1.4 and Icarus define preprocessing	fafa1971	6288d 10h	/