URL https://opencores.org/ocsvn/sdhc-sc-core/sdhc-sc-core/trunk

Subversion Repositories sdhc-sc-core

[/] - Rev 93

Rev	Log message	Author	Age	Path
93	Don´t run a full synthesis for SdData alone. It won´t fit.	rkastl	4924d 18h	/
92	SdData: Sending in standard and wide mode (incl. simple not automated testbench and synthesis), refs #31.	rkastl	4924d 18h	/
91	Settings for tty.	rkastl	4924d 18h	/
90	Fixes the milestone ReadCID. It works with SD2.0 (non HC) card.	rkastl	4924d 18h	/
89	Fixes #27, R3 uses '1111111' as CRC.	rkastl	4924d 18h	/
88	Timeouts inserted, Sending Card status via Rs232 if changed	rkastl	4924d 18h	/
87	TbdSd: Baudrate set to 115200, refs #28	rkastl	4924d 18h	/
86	Rs232Tx: testbench, refs #28	rkastl	4924d 18h	/
85	Synthese: TbdSd refactored to enable sharing. Sim: SdVerificationTestbench to new tcl script ported SdController: TimeoutGenerator added, refs #27	rkastl	4924d 18h	/
84	SdController: Refactored	rkastl	4924d 18h	/
83	SdCmd: Refactored	rkastl	4924d 18h	/
82	Timeoutgenerator: Build fixed	rkastl	4924d 18h	/
81	SdCmd: Build fixed and converted to better version	rkastl	4924d 18h	/
80	Renamed .vhd to .vhdl in last commit.	rkastl	4924d 18h	/
79	Rs232Tx: added to TbdSd TimeoutGenerator: written	rkastl	4924d 18h	/
78	Rs232Tx: implemented, but not tested	rkastl	4924d 18h	/
77	refs #25, synthesis works again	rkastl	4924d 18h	/
76	SdCmd: ioCmd, output registered, fixes #26	rkastl	4924d 18h	/
75	Transfer to SbX, ref #17	rkastl	4924d 18h	/
74	Testbed: All pins, refs #17	rkastl	4924d 18h	/