URL https://opencores.org/ocsvn/simple_fm_receiver/simple_fm_receiver/trunk

Subversion Repositories simple_fm_receiver

[/] - Rev 31

Rev	Log message	Author	Age	Path
31	Include flattening process, simplify build system.	arif_endro	5776d 02h	/
30	Clean up.	arif_endro	5820d 07h	/
29	Done fixing Makefile for Alliance.	arif_endro	5820d 07h	/
28	chip IO place.	arif_endro	5821d 03h	/
27	chip IO interface.	arif_endro	5821d 03h	/
26	Removed.	arif_endro	5821d 03h	/
25	IO place.	arif_endro	5821d 03h	/
24	Update to use Alliance CAD System by ASIM/LIP6/UMPC	arif_endro	5821d 05h	/
23	Disable clear signal.	arif_endro	5821d 05h	/
22	Update last bit output assignment method.	arif_endro	5821d 05h	/
21	This commit was manufactured by cvs2svn to create tag 'version_1_1'.		7006d 06h	/
20	New Version	arif_endro	7006d 06h	/
19	Screen shot from chipscope analyzer view, this is how this design work.	arif_endro	7012d 04h	/
18	This bit files generates better wave than previous (i.e. more smooth)	arif_endro	7012d 07h	/
17	Initial Checkin	arif_endro	7020d 04h	/
16	Changes constan and minor fix	arif_endro	7023d 07h	/
15	Xilinx FPGA XC2V2000 bit files the first version.	arif_endro	7026d 05h	/
14	* empty log message *	arif_endro	7031d 03h	/
13	Update License	arif_endro	7042d 04h	/
12	Update License Change reset signal handle	arif_endro	7042d 04h	/