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Rev Log message Author Age Path
28 Added old uploaded documents to new repository. root 5733d 02h /
27 New directory structure. root 5733d 02h /
26 This commit was manufactured by cvs2svn to create tag 'rel_8'. 7553d 18h /
25 CTRL register bit fields changed, VATS testing support added. simons 7553d 18h /
24 This commit was manufactured by cvs2svn to create tag 'rel_7'. 7804d 20h /
23 This commit was manufactured by cvs2svn to create tag 'asyst_3'. 7804d 20h /
22 This commit was manufactured by cvs2svn to create tag 'asyst_2'. 7804d 20h /
21 Byte selects changed. simons 7804d 20h /
20 This commit was manufactured by cvs2svn to create tag 'rel_6'. 7806d 00h /
19 Errors fixed. simons 7806d 00h /
18 This commit was manufactured by cvs2svn to create tag 'rel_5'. 7808d 21h /
17 Define mess fixed. simons 7808d 21h /
16 This commit was manufactured by cvs2svn to create tag 'rel_4'. 7809d 01h /
15 Defines set in order. simons 7809d 01h /
14 This commit was manufactured by cvs2svn to create tag 'rel_3'. 7809d 18h /
13 8-bit WB access enabled. simons 7809d 18h /
12 Error fixed. simons 7830d 01h /
11 This commit was manufactured by cvs2svn to create tag 'rel_2'. 7848d 01h /
10 Slave select signal generation bug fixed, default case added when reading registers, to avoid latches. simons 7848d 01h /
9 Support for 128 bits character length added. Zero value divider bug fixed. simons 7888d 18h /

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