OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] - Rev 104

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
104 add white_box directory to test suite arniml 7395d 04h /
103 add testbench peripherals for P1 and P2
this became necessary to observe a difference between externally applied
port data and internally applied port data
arniml 7395d 04h /
102 update for changes in address space of external memory arniml 7395d 04h /
101 assert p2_read_p2_o when expander port is read arniml 7395d 04h /
100 reorder data_o generation arniml 7395d 04h /
99 initial check-in arniml 7395d 04h /
98 Fix bug "ANL and ORL to P1/P2 read port status instead of port output register" arniml 7395d 05h /
97 initial check-in arniml 7395d 05h /
96 select dedicated directorie(s) for regression arniml 7396d 02h /
95 check counter inactivity arniml 7396d 02h /
94 initial check-in arniml 7396d 02h /
93 add support for line coverage evaluation with gcov arniml 7396d 03h /
92 work around bug in Quartus II 4.0 arniml 7396d 03h /
91 fix edge detector bug for counter arniml 7396d 03h /
90 intial check-in arniml 7396d 03h /
89 initial check-in arniml 7409d 23h /
88 allow memory bank switching during interrupts arniml 7411d 01h /
87 abort gracfullt if memory bank switching does not work arniml 7411d 01h /
86 update notice about expander port instructions arniml 7411d 06h /
85 initial check-in arniml 7411d 06h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.