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Rev Log message Author Age Path
187 Fix bug reports:
"Target address of JMP to Program Memory Bank 1 corrupted by interrupt"
"Return address of CALL to Program Memory Bank 1 corrupted by interrupt"
int_in_progress_o was active one cycle before int_pending_o is
asserted. this confused the mb multiplexer which determines the state of
the memory bank selection flag
arniml 6944d 08h /
186 update to version 0.2 arniml 6945d 09h /
185 initial check-in arniml 6950d 07h /
184 initial check-in arniml 6950d 09h /
183 fix missing assignment to outclock arniml 6950d 11h /
182 intermediate version arniml 7030d 10h /
181 fix typo arniml 7030d 13h /
180 introduce prefix 't48_' for wb_master entity and configuration arniml 7038d 19h /
179 introduce prefix 't48_' for all packages, entities and configurations arniml 7038d 19h /
178 Move latching of BUS to MSTATE2
-> sample BUS at the end of RD'
arniml 7040d 07h /
177 Implement db_dir_o glitch-safe arniml 7040d 07h /
176 Use en_clk_i instead of xtal3_s for generation of external signals.
This is required when the core runs with full xtal clock instead
of xtal/3 (xtal_div_3_g = 0).
arniml 7040d 07h /
175 add bug report
"MSB of Program Counter changed upon PC increment"
arniml 7041d 10h /
174 fix bug report
"MSB of Program Counter changed upon PC increment"
arniml 7041d 10h /
173 testcase for bug report
"MSB of Program Counter changed upon PC increment"
arniml 7041d 10h /
172 save data from wishbone bus in register bank with wb_ack
necessary to hold data from peripheral/memory until it is read by T48
arniml 7070d 06h /
171 remove obsolete output stack_high_o arniml 7071d 06h /
170 intermediate update arniml 7072d 13h /
169 initial check-in arniml 7072d 18h /
168 change address range of wb_master arniml 7072d 18h /

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