OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] - Rev 203

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
203 * shift assertion of ALE and PROG to xtal3
* correct change of revision 1.8		 arniml 6954d 16h /
202 fix address assignment arniml 6954d 16h /
201 split low impedance markers for P2 arniml 6954d 16h /
200 add check for
tCP: Port Control Setup to PROG'		 arniml 6954d 16h /
199 initial check-in arniml 6954d 16h /
198 fix package dependencies arniml 6954d 21h /
197 preliminary version 0.3 arniml 6956d 00h /
196 update to version 0.3 arniml 6956d 00h /
195 Suppress assertion of bus_read_bus_s when interrupt is pending.
This should fix bug report
"PROBLEM WHEN INT AND JMP"		 arniml 6956d 03h /
194 initial check-in arniml 6956d 03h /
193 iManual arniml 6971d 05h /
192 update list for Wishbone toplevel arniml 6971d 16h /
191 preliminary version 0.2 arniml 6971d 20h /
190 finalize change log for release 0.6 beta arniml 6972d 14h /
189 add bug report
"Target address of JMP and CALL to Program Memory Bank 1 corrupted by interrupt"		 arniml 7003d 16h /
188 move check for int_pending_s into ea_i_='0' branch
this fixes a glitch on PCH when an interrutp occurs
during external program memory fetch		 arniml 7003d 16h /
187 Fix bug reports:
"Target address of JMP to Program Memory Bank 1 corrupted by interrupt"
"Return address of CALL to Program Memory Bank 1 corrupted by interrupt"
int_in_progress_o was active one cycle before int_pending_o is
asserted. this confused the mb multiplexer which determines the state of
the memory bank selection flag		 arniml 7003d 17h /
186 update to version 0.2 arniml 7004d 18h /
185 initial check-in arniml 7009d 16h /
184 initial check-in arniml 7009d 17h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.