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Rev Log message Author Age Path
29 take auxiliary carry from direct ALU connection arniml 7436d 16h /
28 update wiring for DA support arniml 7436d 16h /
27 implemented mnemonic DA arniml 7436d 16h /
26 support for DA instruction arniml 7436d 16h /
25 initial check-in arniml 7436d 16h /
24 connect control signal for Port 2 expander arniml 7437d 00h /
23 rework Port 2 expander handling arniml 7437d 00h /
22 merge MN_ANLD, MN_MOVD_PP_A and MN_ORLD_PP_A to OUTLD_PP_A arniml 7437d 00h /
21 implement mnemonics:
+ MOVD_A_PP
+ OUTD_PP_A -> ANLD PP, A; MOVD PP, A; ORLD PP, A
arniml 7437d 00h /
20 move code for PROG out of if-branch for xtal3_s arniml 7437d 00h /
19 enhance simulation result string arniml 7438d 15h /
18 fix constant format arniml 7438d 15h /
17 fix test arniml 7438d 15h /
16 fix header arniml 7438d 15h /
15 initial check-in arniml 7439d 14h /
14 initial check-in arniml 7439d 15h /
13 This commit was manufactured by cvs2svn to create tag 'transfer'. 7439d 15h /
12 Imported sources arniml 7439d 15h /
11 add description arniml 7439d 15h /
10 put ext_ram on falling clock edge to sample the write enable proberly arniml 7440d 14h /

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