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Subversion Repositories t6507lp

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Rev Log message Author Age Path
256 fp files creep 5425d 23h /
255 Changed the PADS verilog description to minimize violations creep 5425d 23h /
254 Fixed a latch in the design creep 5425d 23h /
253 Changed the rw_mem signal name in the hierarchy creep 5449d 00h /
252 Added a stubs file for the pads. creep 5449d 00h /
251 Added the io wrapper creep 5449d 03h /
250 Synthesis script changed creep 5449d 03h /
249 Renamed the synthesis script creep 5449d 23h /
248 Added a low power synthesis script creep 5454d 22h /
247 Added the cpu mapped verilog creep 5454d 22h /
246 Added some older files plus the first syn script creep 5456d 02h /
245 Added a few dirs for the synthesis creep 5456d 02h /
244 Added a few dirs for the synthesis creep 5456d 03h /
243 Fixing STA_IDY bug creep 5497d 19h /
242 Bug regardind the STA_IDY opcode creep 5497d 23h /
241 Fixed half the problem with strange STA behavior. creep 5498d 22h /
240 Finally fixed the decimal mode! creep 5499d 00h /
239 Zero flag fixed for SBC while in Decimal Mode. Bug #34. gabrieloshiro 5499d 01h /
238 ALU file is linted. creep 5501d 22h /
237 Added a preliminary collision detection logic. creep 5502d 23h /

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