URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

[/] - Rev 263

Rev	Log message	Author	Age	Path
263	Added the final reports from synthesis without a VCD	creep	5506d 04h	/
262	Final synthesis script.	creep	5506d 04h	/
261	Added a better clock gating scheme with enable sharing	creep	5506d 07h	/
260	removing useless files	creep	5509d 01h	/
259	sync	creep	5509d 01h	/
258	Fixed the input parametric testing logic, removed a pad.	creep	5509d 01h	/
257	Modified script for DFT	creep	5531d 04h	/
256	fp files	creep	5531d 04h	/
255	Changed the PADS verilog description to minimize violations	creep	5531d 04h	/
254	Fixed a latch in the design	creep	5531d 04h	/
253	Changed the rw_mem signal name in the hierarchy	creep	5554d 04h	/
252	Added a stubs file for the pads.	creep	5554d 05h	/
251	Added the io wrapper	creep	5554d 07h	/
250	Synthesis script changed	creep	5554d 08h	/
249	Renamed the synthesis script	creep	5555d 04h	/
248	Added a low power synthesis script	creep	5560d 02h	/
247	Added the cpu mapped verilog	creep	5560d 02h	/
246	Added some older files plus the first syn script	creep	5561d 07h	/
245	Added a few dirs for the synthesis	creep	5561d 07h	/
244	Added a few dirs for the synthesis	creep	5561d 07h	/