OpenCores
URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

[/] - Rev 60

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
60 File name change. HAL says so! creep 5728d 22h /
59 I`ve fixed some latch creation. gabrieloshiro 5728d 23h /
58 ALU with all opcodes ready for simulation. gabrieloshiro 5728d 23h /
57 A very simple testbench that checks the execution for a single instruction, i.e. no memory. creep 5728d 23h /
56 Several changes in the output logic to respect the pipelining. creep 5728d 23h /
55 ALU has all opcodes now! Comments inside ALU are completely wrong. gabrieloshiro 5729d 00h /
54 Processor Status register modified. gabrieloshiro 5729d 03h /
53 Added default header. creep 5729d 07h /
52 Removed unecessary always block. creep 5729d 23h /
51 Some first ideas on testbench. creep 5729d 23h /
50 Testing. creep 5730d 01h /
49 Bla bla bla gabrieloshiro 5730d 01h /
48 Updated reference to header file. creep 5730d 01h /
47 Added a new folder where the users should run the tools. creep 5730d 01h /
46 Update project status. creep 5730d 01h /
45 Removed the CVS $log tag. creep 5730d 01h /
44 Now it is compiling using ncvlog. creep 5730d 02h /
43 Removed the CVS $log tag. creep 5730d 02h /
42 testing the log tag creep 5730d 02h /
41 Spec revision 1.2 added. creep 5730d 02h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.