URL https://opencores.org/ocsvn/t80/t80/trunk

Subversion Repositories t80

[/] - Rev 27

Rev	Log message	Author	Age	Path
27	Xilinx SSRAM, initial release	jesus	7926d 06h	/
26	Fixed instruction timing for POP and DJNZ	jesus	7939d 22h	/
25	IX/IY timing and ADC/SBC fix	jesus	7941d 08h	/
24	no message	jesus	7947d 05h	/
23	Fixed T2Write	jesus	7947d 05h	/
22	Added 8080 top level	jesus	7947d 05h	/
21	no message	jesus	7952d 04h	/
20	Updated for new T80s generic	jesus	7952d 04h	/
19	Initial version	jesus	7952d 04h	/
18	Added T2Write generic	jesus	7952d 11h	/
17	Removed write through	jesus	7954d 03h	/
16	no message	jesus	7954d 07h	/
15	Added clock enable and fixed IM 2	jesus	7961d 06h	/
14	Changed to Xilinx ROM	jesus	7980d 18h	/
13	Initial import	jesus	7980d 18h	/
12	Initial import	jesus	7980d 19h	/
11	Added support for XST	jesus	7980d 19h	/
10	Added dummy files	jesus	7980d 20h	/
9	Initial import	jesus	7982d 06h	/
8	Fixed refresh address and DJNZ instruction	jesus	7982d 07h	/