URL https://opencores.org/ocsvn/t80/t80/trunk

Subversion Repositories t80

[/] - Rev 27

Rev	Log message	Author	Age	Path
27	Xilinx SSRAM, initial release	jesus	7949d 16h	/
26	Fixed instruction timing for POP and DJNZ	jesus	7963d 08h	/
25	IX/IY timing and ADC/SBC fix	jesus	7964d 18h	/
24	no message	jesus	7970d 15h	/
23	Fixed T2Write	jesus	7970d 15h	/
22	Added 8080 top level	jesus	7970d 15h	/
21	no message	jesus	7975d 14h	/
20	Updated for new T80s generic	jesus	7975d 14h	/
19	Initial version	jesus	7975d 14h	/
18	Added T2Write generic	jesus	7975d 21h	/
17	Removed write through	jesus	7977d 13h	/
16	no message	jesus	7977d 17h	/
15	Added clock enable and fixed IM 2	jesus	7984d 16h	/
14	Changed to Xilinx ROM	jesus	8004d 04h	/
13	Initial import	jesus	8004d 04h	/
12	Initial import	jesus	8004d 05h	/
11	Added support for XST	jesus	8004d 05h	/
10	Added dummy files	jesus	8004d 06h	/
9	Initial import	jesus	8005d 16h	/
8	Fixed refresh address and DJNZ instruction	jesus	8005d 17h	/