OpenCores
URL https://opencores.org/ocsvn/t80/t80/trunk

Subversion Repositories t80

[/] - Rev 30

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
30 Changed to xilinx specific RAM jesus 7929d 00h /
29 Fixed (IX/IY+d) timing and added all GB op-codes jesus 7929d 00h /
28 Adapted for zxgate jesus 7930d 00h /
27 Xilinx SSRAM, initial release jesus 7930d 00h /
26 Fixed instruction timing for POP and DJNZ jesus 7943d 16h /
25 IX/IY timing and ADC/SBC fix jesus 7945d 02h /
24 no message jesus 7950d 23h /
23 Fixed T2Write jesus 7950d 23h /
22 Added 8080 top level jesus 7950d 23h /
21 no message jesus 7955d 22h /
20 Updated for new T80s generic jesus 7955d 22h /
19 Initial version jesus 7955d 22h /
18 Added T2Write generic jesus 7956d 05h /
17 Removed write through jesus 7957d 21h /
16 no message jesus 7958d 01h /
15 Added clock enable and fixed IM 2 jesus 7965d 00h /
14 Changed to Xilinx ROM jesus 7984d 12h /
13 Initial import jesus 7984d 12h /
12 Initial import jesus 7984d 13h /
11 Added support for XST jesus 7984d 13h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.