OpenCores
URL https://opencores.org/ocsvn/t80/t80/trunk

Subversion Repositories t80

[/] - Rev 43

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
43 *** empty log message *** jesus 7884d 16h /
42 Fixed bus req/ack cycle jesus 7884d 16h /
41 Removed UNISIM library jesus 7884d 16h /
40 Cleanup jesus 7884d 16h /
39 Added -n option and component declaration jesus 7912d 13h /
38 Added Leonardo .ucf generation jesus 7912d 13h /
37 Changed to single register file jesus 7912d 16h /
36 Added component declaration jesus 7912d 16h /
35 Release 0242 jesus 7919d 04h /
34 Updated for ISE 5.1 jesus 7919d 09h /
33 Fixed typo jesus 7929d 01h /
32 Fixed for ISE 5.1 jesus 7929d 01h /
31 Fixed generic name error jesus 7932d 03h /
30 Changed to xilinx specific RAM jesus 7938d 03h /
29 Fixed (IX/IY+d) timing and added all GB op-codes jesus 7938d 03h /
28 Adapted for zxgate jesus 7939d 03h /
27 Xilinx SSRAM, initial release jesus 7939d 03h /
26 Fixed instruction timing for POP and DJNZ jesus 7952d 19h /
25 IX/IY timing and ADC/SBC fix jesus 7954d 05h /
24 no message jesus 7960d 01h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.