URL https://opencores.org/ocsvn/t80/t80/trunk

Subversion Repositories t80

[/] - Rev 46

Rev	Log message	Author	Age	Path
46	Made some bugfixes	andreas	6864d 15h	/
45	Fixed loopback break generation	jesus	7865d 17h	/
44	Added some missing features and fixed baud rate generator	jesus	7866d 06h	/
43	* empty log message *	jesus	7874d 18h	/
42	Fixed bus req/ack cycle	jesus	7874d 18h	/
41	Removed UNISIM library	jesus	7874d 18h	/
40	Cleanup	jesus	7874d 18h	/
39	Added -n option and component declaration	jesus	7902d 15h	/
38	Added Leonardo .ucf generation	jesus	7902d 15h	/
37	Changed to single register file	jesus	7902d 18h	/
36	Added component declaration	jesus	7902d 18h	/
35	Release 0242	jesus	7909d 06h	/
34	Updated for ISE 5.1	jesus	7909d 11h	/
33	Fixed typo	jesus	7919d 03h	/
32	Fixed for ISE 5.1	jesus	7919d 03h	/
31	Fixed generic name error	jesus	7922d 05h	/
30	Changed to xilinx specific RAM	jesus	7928d 05h	/
29	Fixed (IX/IY+d) timing and added all GB op-codes	jesus	7928d 05h	/
28	Adapted for zxgate	jesus	7929d 05h	/
27	Xilinx SSRAM, initial release	jesus	7929d 05h	/