OpenCores
URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] - Rev 34

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
34 Created test for block I/O instructions ghutchis 7182d 15h /
33 Added missing IncDec controls to OUTI/OUTD instructions ghutchis 7183d 12h /
32 Added "bintr" basic interrupt test, which tests Z80 interrupt mode 1. ghutchis 7198d 14h /
31 1) Added environment support for Z80 op decode in log file.
2) Fixed env support for interrupt generation and clearing
ghutchis 7198d 14h /
30 Added HTML version of docs ghutchis 7201d 14h /
29 Added references ghutchis 7201d 14h /
28 Added code to initialize RAM to all 00 at environment start-up time. ghutchis 7201d 14h /
27 Modified tvs80 test to run from a ROM image, and work with the
standard environment.
ghutchis 7201d 14h /
26 Updated docs ghutchis 7201d 15h /
25 Added XML master document ghutchis 7201d 17h /
24 tv80s.v ghutchis 7212d 04h /
23 Completed conversion to one-hot encoding ghutchis 7224d 18h /
22 Changed starting state for one-hot tstate ghutchis 7224d 18h /
21 Replaced encoded states with one-hot ghutchis 7225d 19h /
20 Merged suggested patches from HPA into test branch ghutchis 7247d 06h /
19 This commit was manufactured by cvs2svn to create branch 'hpa1'. 7260d 22h /
18 Updated verification status document ghutchis 7260d 22h /
17 Added many additional debug messages. All tests now pass up until
rst (bit reset) instructions.
ghutchis 7260d 22h /
16 Added support for command-line flags to run script. Only flag supported
is "-d" to turn on instruction decode.
ghutchis 7276d 04h /
15 Added additional debug statements to show incremental progress. ghutchis 7276d 04h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.