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Rev Log message Author Age Path
99 Fixed setting of flags for LD A, I and LD A, R instructions

Added new testcase ivec_flags to cover new opcodes
ghutchis 4945d 15h /
98 Changed malloc for strings with constant length copy, add assertion checks for
null pointers in env memory, and fixed some formatting
ghutchis 5290d 08h /
97 Added data in mux, added 16450 UART to environment ghutchis 5294d 12h /
96 Added Z80 op decode to environment, enabled by -k switch ghutchis 5294d 17h /
95 Updated regression script to use SystemC simulation ghutchis 5296d 12h /
94 Ported over env_io.v from Verilog environment to tv_responder.
Basic tests from Verilog environment (hello, fib) now passing in
SystemC environment.
ghutchis 5298d 13h /
93 Added common header file for all systemc environment ghutchis 5299d 12h /
92 Added responder to top level, beginning of support for ihex load ghutchis 5303d 13h /
91 Preliminary support for SystemC/Verilator environment ghutchis 5303d 15h /
90 Fixed syntax errors in core preventing Verilator from compiling.
Added new capability to register generator to make registers which
latch on an external event. Removed spurious copyright notice.
ghutchis 5303d 15h /
89 RTL and environment fixes for nmi bug ghutchis 5323d 18h /
88 Fixed bug introduced by conversion of mcycle to one-hot FSM ghutchis 5325d 09h /
87 Added additional ifdef signals to remove unneede R (refresh) register ghutchis 5340d 17h /
86 Added old uploaded documents to new repository. root 5563d 23h /
85 Added old uploaded documents to new repository. root 5564d 04h /
84 New directory structure. root 5564d 04h /
83 Some fixes from Guy-- replace case with casex. hharte 5637d 11h /
82 Clean up spacing hharte 5647d 07h /
81 Initial version of TV80 Wishbone Wrapper hharte 5647d 07h /
80 Misc. code clean-up on mcode to make code smaller and (hopefully)
more readable.
ghutchis 6746d 19h /

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