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Rev	Log message	Author	Age	Path
104	This commit was manufactured by cvs2svn to create tag 'rel_4'.		7427d 05h	/
103	Brandl Tobias repaired a bug regarding frame error in receiver when brake is received.	tadejm	7427d 05h	/
102	This commit was manufactured by cvs2svn to create tag 'rel_3'.		7455d 07h	/
101	Added 2 LSB address generation dependent on select lines and LITLE/BIG endian when UART is in 32-bit mode.	tadejm	7455d 07h	/
100	Repaired bug in receiver. When stop bit is sampled and next clock RX input was '0', state machine stayed locked until next '1' which cause loosing at least start bit in case of larger difference of bit times between 2 UARTs.	tadejm	7455d 08h	/
99	Added synchronizer flops for RX input.	tadejm	7455d 08h	/
98	Added to synchronize RX input to Wishbone clock.	tadejm	7455d 08h	/
97	This commit was manufactured by cvs2svn to create tag 'rel_2'.		7510d 16h	/
96	Testbench with complete selfchecking. BUG is that THRE status is set at the end of last sent bit when TX FIFO is empty instead only when TX FIFO is empty. This sauses testcases not to finish.	tadejm	7510d 16h	/
95	Testbench with complete selfchecking. BUG is that THRE status is set at the end of last sent bit when TX FIFO is empty instead only when TX FIFO is empty. This causes testcases not to finish.	tadejm	7510d 16h	/
94	Testbench with complete selfchecking. BUG is that THRE status is set at the end of last sent bit when TX FIFO is empty instead when only TX FIFO gets empty. This causes testcases not to finish.	tadejm	7510d 16h	/
93	Testbench with complete selfchecking. BUG is that THRE status is set at the end of last sent bit when TX FIFO is empty instead when only TX FIFO gets empty. This causes testcases not to finish.	tadejm	7510d 16h	/
92	This is revision 1.4, revision 1.5 was put there by mistake.	simons	7624d 09h	/
91	Removed files due to new complete testbench.	tadejm	7625d 00h	/
90	Add Flextronics header	avisha	7627d 07h	/
89	adjusted comment + define	dries	7707d 12h	/
88	added clearing the receiver fifo statuses on resets	gorban	7770d 01h	/
87	This fixes errors in some cases when data is being read and put to the FIFO at the same time. Patch is submitted by Scott Furman. Update is very recommended.	gorban	7800d 03h	/
86	restored include for uart_defines.v in uart_test.v	gorban	8070d 07h	/
85	Updated documentation to include latest changes.	gorban	8103d 23h	/

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Subversion Repositories uart16550

[/] - Rev 104

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