URL https://opencores.org/ocsvn/uart16550/uart16550/trunk

Subversion Repositories uart16550

[/] - Rev 46

Rev	Log message	Author	Age	Path
46	Fixed bug that prevented synthesis in uart_receiver.v	gorban	8261d 21h	/
45	Lots of fixes: Break condition wasn't handled correctly at all. LSR bits could lose their values. LSR value after reset was wrong. Timing of THRE interrupt signal corrected. LSR bit 0 timing corrected.	gorban	8262d 21h	/
44	fixed more typo bugs	gorban	8276d 21h	/
43	lsr1r error fixed.	mohor	8277d 04h	/
42	ti_int_pnd error fixed.	mohor	8277d 04h	/
41	ti_int_d error fixed.	mohor	8277d 04h	/
40	Synthesis bugs fixed. Some other minor changes	gorban	8279d 06h	/
39	Comments in Slovene language deleted, few small fixes for better work of old tools. IRQs need to be fix.	mohor	8281d 04h	/
38	small update to test interrupts	gorban	8282d 01h	/
37	Heavily rewritten interrupt and LSR subsystems. Many bugs hopefully squashed.	gorban	8282d 01h	/
36	no message	mohor	8287d 09h	/
35	Fixes to break and timeout conditions	gorban	8289d 03h	/
34	fixed parity sending and tx_fifo resets over- and underrun	gorban	8291d 02h	/
33	Small synopsis fixes	gorban	8300d 09h	/
32	Changes data_out to be synchronous again as it should have been.	gorban	8301d 02h	/
31	small fix	gorban	8301d 22h	/
30	Modified port names again	gorban	8356d 03h	/
29	Things connected to parity changed. Clock devider changed.	mohor	8356d 22h	/
28	FIFO was not cleared after the data was read bug fixed.	mohor	8357d 10h	/
27	Stop bit bug fixed. Parity bug fixed. WISHBONE read cycle bug fixed, OE indicator (Overrun Error) bug fixed. PE indicator (Parity Error) bug fixed. Register read bug fixed.	mohor	8358d 03h	/