URL https://opencores.org/ocsvn/uart16550/uart16550/trunk

Subversion Repositories uart16550

[/] - Rev 47

Rev	Log message	Author	Age	Path
47	Fixed: timeout and break didn't pay attention to current data format when counting time	gorban	8287d 19h	/
46	Fixed bug that prevented synthesis in uart_receiver.v	gorban	8288d 17h	/
45	Lots of fixes: Break condition wasn't handled correctly at all. LSR bits could lose their values. LSR value after reset was wrong. Timing of THRE interrupt signal corrected. LSR bit 0 timing corrected.	gorban	8289d 17h	/
44	fixed more typo bugs	gorban	8303d 17h	/
43	lsr1r error fixed.	mohor	8304d 00h	/
42	ti_int_pnd error fixed.	mohor	8304d 00h	/
41	ti_int_d error fixed.	mohor	8304d 00h	/
40	Synthesis bugs fixed. Some other minor changes	gorban	8306d 02h	/
39	Comments in Slovene language deleted, few small fixes for better work of old tools. IRQs need to be fix.	mohor	8308d 00h	/
38	small update to test interrupts	gorban	8308d 21h	/
37	Heavily rewritten interrupt and LSR subsystems. Many bugs hopefully squashed.	gorban	8308d 21h	/
36	no message	mohor	8314d 05h	/
35	Fixes to break and timeout conditions	gorban	8316d 00h	/
34	fixed parity sending and tx_fifo resets over- and underrun	gorban	8317d 22h	/
33	Small synopsis fixes	gorban	8327d 05h	/
32	Changes data_out to be synchronous again as it should have been.	gorban	8327d 23h	/
31	small fix	gorban	8328d 18h	/
30	Modified port names again	gorban	8382d 23h	/
29	Things connected to parity changed. Clock devider changed.	mohor	8383d 18h	/
28	FIFO was not cleared after the data was read bug fixed.	mohor	8384d 06h	/