URL https://opencores.org/ocsvn/uart16550/uart16550/trunk

Subversion Repositories uart16550

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Rev	Log message	Author	Age	Path
91	Removed files due to new complete testbench.	tadejm	7499d 03h	/
90	Add Flextronics header	avisha	7501d 10h	/
89	adjusted comment + define	dries	7581d 15h	/
88	added clearing the receiver fifo statuses on resets	gorban	7644d 04h	/
87	This fixes errors in some cases when data is being read and put to the FIFO at the same time. Patch is submitted by Scott Furman. Update is very recommended.	gorban	7674d 06h	/
86	restored include for uart_defines.v in uart_test.v	gorban	7944d 10h	/
85	Updated documentation to include latest changes.	gorban	7978d 02h	/
84	The uart_defines.v file is included again in sources.	gorban	7991d 01h	/
83	Reverted to include uart_defines.v file in other files again.	gorban	7991d 01h	/
82	Updated to work with latest core.	gorban	7997d 23h	/
81	Added lastest additions.	gorban	7998d 00h	/
80	Remove uart_fifo.v because it is replaced by other 2 files.	gorban	7998d 00h	/
79	Bug Fixes: * Possible loss of sync and bad reception of stop bit on slow baud rates fixed. Problem reported by Kenny.Tung. * Bad (or lack of ) loopback handling fixed. Reported by Cherry Withers. Improvements: * Made FIFO's as general inferrable memory where possible. So on FPGA they should be inferred as RAM (Distributed RAM on Xilinx). This saves about 1/3 of the Slice count and reduces P&R and synthesis times. * Added optional baudrate output (baud_o). This is identical to BAUDOUT* signal on 16550 chip. It outputs 16xbit_clock_rate - the divided clock. It's disabled by default. Define UART_HAS_BAUDRATE_OUTPUT to use.	gorban	7998d 00h	/
78	This commit was manufactured by cvs2svn to create tag 'rel_1'.		8151d 06h	/
77	This commit was manufactured by cvs2svn to create tag 'asyst_3'.		8151d 06h	/
76	This commit was manufactured by cvs2svn to create tag 'asyst_2'.		8151d 06h	/
75	Endian define added. Big Byte Endian is selected by default.	mohor	8151d 06h	/
74	tf_overrun signal was disabled since it was not used	gorban	8156d 07h	/
73	major bug in 32-bit mode that prevented register access fixed.	gorban	8163d 06h	/
72	UART PHY added. Files are fully operational, working on HW.	mohor	8176d 14h	/

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Subversion Repositories uart16550

[/] - Rev 91

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