URL https://opencores.org/ocsvn/uart16750/uart16750/trunk

Subversion Repositories uart16750

[/] - Rev 10

Rev	Log message	Author	Age	Path
10	UART16750: Removed dependency from std_logic_unsigned	hasw	5613d 06h	/
9	Registered control line outputs	hasw	5622d 08h	/
8	Make memory read in generic FIFO model synchronous for optimized used with XST	hasw	5622d 08h	/
7	Removed async. reset of FIFO memory cells for optimized usage of default FIFO model with XST	hasw	5623d 12h	/
6	THR empty interrupt register connected to RST	hasw	5623d 13h	/
5	Removed old component	hasw	5624d 07h	/
4	Removed swap file	hasw	5624d 08h	/
3	This commit was manufactured by cvs2svn to create tag 'Import'.		5624d 08h	/
2	Imported sources	hasw	5624d 08h	/
1	Standard project directories initialized by cvs2svn.		5624d 08h	/