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Subversion Repositories uart2bus_testbench

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Rev Log message Author Age Path
12 HanySalah 2543d 18h /
11 + add the first edition of coverage driven methodogy for text mode only HanySalah 2543d 19h /
10 add maximum simulation time + refine the reporting phase HanySalah 2543d 20h /
9 Change the verbosity of passed test message to be UVM_HIGH + add the reporting message in the report phase in testfile HanySalah 2543d 21h /
8 HanySalah 2673d 02h /
7 Remove run tests from topmodule HanySalah 3031d 18h /
6 HanySalah 3031d 18h /
5 remove coverage requirement section HanySalah 3032d 06h /
4 HanySalah 3032d 07h /
3 HanySalah 3032d 07h /
2 Initial Version HanySalah 3057d 20h /
1 The project and the structure was created root 3058d 09h /

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