OpenCores
URL https://opencores.org/ocsvn/usb_dongle_fpga/usb_dongle_fpga/trunk

Subversion Repositories usb_dongle_fpga

[/] - Rev 25

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
25 Added flash_sts status check as flash_sts pin works now (flas_sts had 2 inputs pins what caused it not to work propery now one is highZ output).
Added 64K byte block read when read length is 0		 nuubik 5945d 12h /
24 Added changes for new dongle HW code 5 features nuubik 5945d 12h /
23 Inlined dongle spesific Uspp code to dongle.py script separate Uspp is no longer needed.
Forced serial port to hw flow control mode.
Added support for new dongle HW code 5 to support fast read and fast write modes		 nuubik 5945d 12h /
22 Inlined dongle spesific Uspp code to dongle.py script separate Uspp is no longer needed nuubik 5945d 12h /
21 This commit was manufactured by cvs2svn to create tag 'version_1_4'. 5958d 15h /
20 Fix'ed TAR cycle second part this is not critical update nuubik 5958d 15h /
19 Fix'ed cycle type init code copy/pase mistake nuubik 5958d 16h /
18 Fixed in reset init of some trigers (this should not have generated extra hardware in FPGA but just to be on the safe side) nuubik 5959d 16h /
17 changed version code to 04 and added spy mode by puting jumpers on header and also implemented LPC Firmware Hub read to enable this booting mode (selectable by header jumper see documentation) nuubik 5959d 16h /
16 Synchronisation with OpenCores release nuubik 6092d 13h /
15 changed version code to 03 and disabled spy mode on juper setting 00 (this disabled booting but postcode IO write was displayed) nuubik 6209d 16h /
14 added comment on POR time influence when booting from LPC dongle nuubik 6221d 15h /
13 This commit was manufactured by cvs2svn to create tag 'SoftVersion_1_1'. 6323d 09h /
12 Added windows py bindings check with nice info print with link to installer nuubik 6323d 09h /
11 one ; in line end possible runtime error nuubik 6323d 09h /
10 fixed a typo nuubik 6327d 06h /
9 Made failing on port open retry nuubik 6327d 07h /
8 Added PCB level test options nuubik 6327d 14h /
7 Fixed pin modes and resyntesized nuubik 6327d 14h /
6 Fixed Cyclon part no in datasheets and drawings nuubik 6364d 12h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.