URL https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk

Subversion Repositories versatile_mem_ctrl

[/] - Rev 74

Rev	Log message	Author	Age	Path
74	Minor update of rtl Makefile.	mikaeljf	5215d 22h	/
73	Minor updates to fix lost revisions 69 and 70.	mikaeljf	5215d 23h	/
72	Restored lost revisions 69 and 70.	mikaeljf	5216d 00h	/
71	Replacing versatile_mem_ctrl_top with revisino 68 version but with top level ack fix. May lose some of revision 69 and 70 changes	julius	5216d 00h	/
70		mikaeljf	5219d 06h	/
69		mikaeljf	5220d 03h	/
68	cleaqnup	unneback	5221d 15h	/
67	added FSM for wb if	unneback	5221d 15h	/
66		unneback	5221d 18h	/
65	added	unneback	5221d 18h	/
64	Changed sdr 16 FSM to use defines instead of parameters which were somehow screwing up synplify, reinstated used of sdr_16_defines.v file	julius	5222d 18h	/
63	Fixed a couple of sdr_16 bugs to do with tracking of opened banks	julius	5223d 01h	/
62	Added note to sdr_16_defines.v asking if it's still used	julius	5223d 03h	/
61	Fixed blocking/nonblocking assign issue in sdr_16 fsm	julius	5227d 02h	/
60	Added synthesis directives ensuring registering of right signals in IOBs for sdr16 controller. Removed comment stripping from vppreproc command for sdr_16 creation.	julius	5227d 02h	/
59	counter changed to shift register	unneback	5227d 03h	/
58	sdr_16 fixes for timing - extra egress register stage, appropriate changes in sdr_16 fsm	julius	5228d 04h	/
57	added support for early termination of burst access	unneback	5229d 07h	/
56	corrected fifo_rd_data in state w4d	unneback	5231d 00h	/
55	Fixed up sdr16 dqm output	julius	5231d 18h	/