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Rev Log message Author Age Path
44 Changed timing section in VGA core, changed testbench accordingly.
Fixed bug in 'timing check' test.		 rherveille 7757d 10h /
43 Added WISHBONE revB.3 Registered Feedback Cycles support rherveille 7758d 01h /
42 This commit was manufactured by cvs2svn to create tag 'rel_1'. 8090d 11h /
41 specs version 1.1 rherveille 8090d 11h /
40 no message rherveille 8090d 11h /
39 Changed video timing generator.
Changed wishbone master vertical gate count code.
Fixed a potential bug in the wishbone slave (cursor color register readout).		 rherveille 8090d 13h /
38 Changed testbench to reflect modified VGA timing generator. rherveille 8090d 13h /
37 Fixed a potential reset bug in the hint & vint generation. rherveille 8105d 16h /
36 Fixed two small bugs that only showed up when the hardware cursors were disabled rherveille 8113d 18h /
35 no message rherveille 8113d 21h /
34 Added hardware cursor support to wishbone master.
Added provision to turn-off 3D cursors.
Fixed some minor bugs.		 rherveille 8137d 06h /
33 Added 64x64pixels 4bpp hardware cursor support. rherveille 8137d 12h /
32 Fixed dat_o incomplete sensitivity list. rherveille 8144d 16h /
31 Some minor bug-fixes.
Changed vga_ssel into vga_curproc (cursor processor).		 rherveille 8153d 12h /
30 Fixed some bugs discovered by modified testbench
Removed / Changed some strange logic constructions
Started work on hardware cursor support (not finished yet)
Changed top-level name to vga_enh_top.v		 rherveille 8162d 17h /
29 Added wb_ack delay section to testbench rherveille 8162d 17h /
28 Changed counter-library.
Changed vga-core.
Added 32bpp mode.		 rherveille 8172d 19h /
27 Added 32bpp
Fixed some typos
Added bandwidth section		 rherveille 8172d 19h /
26 Added 32bpp tests rherveille 8172d 19h /
25 C-include file.
Initial release		 rherveille 8239d 12h /

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