OpenCores
URL https://opencores.org/ocsvn/vga_lcd/vga_lcd/trunk

Subversion Repositories vga_lcd

[/] - Rev 49

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
49 Added WISHBONE revB.3 signals rherveille 7763d 21h /
48 WISHBONE revB.3 signals added rherveille 7763d 21h /
47 Added wb_b3_check
Removed ud_cnt, ro_cnt		 rherveille 7764d 18h /
46 Added WISHBONE revB.3 sanity checks rherveille 7764d 18h /
45 Changed timing generator; made it smaller and easier. rherveille 7764d 22h /
44 Changed timing section in VGA core, changed testbench accordingly.
Fixed bug in 'timing check' test.		 rherveille 7764d 23h /
43 Added WISHBONE revB.3 Registered Feedback Cycles support rherveille 7765d 13h /
42 This commit was manufactured by cvs2svn to create tag 'rel_1'. 8098d 00h /
41 specs version 1.1 rherveille 8098d 00h /
40 no message rherveille 8098d 00h /
39 Changed video timing generator.
Changed wishbone master vertical gate count code.
Fixed a potential bug in the wishbone slave (cursor color register readout).		 rherveille 8098d 01h /
38 Changed testbench to reflect modified VGA timing generator. rherveille 8098d 01h /
37 Fixed a potential reset bug in the hint & vint generation. rherveille 8113d 05h /
36 Fixed two small bugs that only showed up when the hardware cursors were disabled rherveille 8121d 06h /
35 no message rherveille 8121d 09h /
34 Added hardware cursor support to wishbone master.
Added provision to turn-off 3D cursors.
Fixed some minor bugs.		 rherveille 8144d 19h /
33 Added 64x64pixels 4bpp hardware cursor support. rherveille 8145d 00h /
32 Fixed dat_o incomplete sensitivity list. rherveille 8152d 05h /
31 Some minor bug-fixes.
Changed vga_ssel into vga_curproc (cursor processor).		 rherveille 8161d 00h /
30 Fixed some bugs discovered by modified testbench
Removed / Changed some strange logic constructions
Started work on hardware cursor support (not finished yet)
Changed top-level name to vga_enh_top.v		 rherveille 8170d 05h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.