URL https://opencores.org/ocsvn/wb_lpc/wb_lpc/trunk

Subversion Repositories wb_lpc

[/] - Rev 15

Rev	Log message	Author	Age	Path
15	fixed bug: Spec vviolation for multi-byte firmware amcesses: the multi-byte firmware accesses incorrectly follow the multi-byte DMA algorithm and issue a SYNC sequence between each byte transferred. Instead, multi-byte firmware accesses should issue a single SYNC sequence following the transfer of the multi-byte data phase	hharte	5958d 01h	/
14	Update for Xilinx ISE 10.1	hharte	5958d 10h	/
13	Add testbench for serirq.	hharte	6091d 10h	/
12	Add serirq support and add DCM block to de-skew LPC_CLK to off-board LPC device.	hharte	6092d 00h	/
11	Add Serial IRQ Support	hharte	6092d 00h	/
10	Added Serial IRQ information.	hharte	6092d 00h	/
9	Add example projects for PCI LPC Host and LPC 7-Segment Display.	hharte	6096d 22h	/
8	Added some details on LPC cycle type definitions, fixed some inconsistencies.	hharte	6096d 23h	/
7	Add example projects for PCI LPC Host and LPC 7-Segment Display.	hharte	6097d 08h	/
6	Clean up whitespace.	hharte	6097d 08h	/
5	Fix bug in LPC Host that was causing a 2nd LPC cycle because the wishbone cycle was not completely retired when going back to the idle state. Also clean up whitespace.	hharte	6097d 08h	/
4	Adding .cvsignore files to ignore .svn directories.	hharte	6099d 11h	/
3	Initial checkin of source files	hharte	6099d 18h	/
2	Initial version of documentation.	hharte	6100d 18h	/
1	Standard project directories initialized by cvs2svn.		6100d 18h	/