URL https://opencores.org/ocsvn/xge_mac/xge_mac/trunk

Subversion Repositories xge_mac

[/] - Rev 29

Rev	Log message	Author	Age	Path
29	Adding parameter for max frame size	antanguay	4152d 06h	/
28	Adding parameter for max frame size	antanguay	4152d 06h	/
27	Fix octets stats on barrel shift transitions	antanguay	4201d 05h	/
26	Fix packet count	antanguay	4207d 06h	/
25	Timing improvements, reduced FIFO size from 1024 to 512	antanguay	4207d 07h	/
24	Use FIFO's for statistics clock domain crossing	antanguay	4207d 09h	/
23	Adding basic packet stats	antanguay	4207d 15h	/
22	Added prototype system verilog testbench	antanguay	4209d 11h	/
21	Improvements for timing, adding alternate FIFO design using XIL define	antanguay	4209d 12h	/
20	Updates for Xilinx synthesis	antanguay	4499d 06h	/
19	Updates for 32/64 bit systems	antanguay	4674d 07h	/
18	Updates for linux 32-bit	antanguay	4675d 04h	/
17	Fixed deprecated SystemC warnings	antanguay	4677d 11h	/
16	Rename tb_xge_mac.v to sv extension to fix issue with newer Modelsim	antanguay	4677d 18h	/
15	Updated for Verilator 3.813	antanguay	4696d 18h	/
14	Change interface to big endian, added serdes examples to testbench	antanguay	5285d 13h	/
13	Change interface to big endian, added serdes examples to testbench	antanguay	5285d 13h	/
12	Change interface to big endian, added serdes examples to testbench	antanguay	5285d 14h	/
11	Fixed clock crossing	antanguay	5391d 11h	/
10	Added details to spec	antanguay	5489d 06h	/