URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_1/] [bench/] - Rev 74

Rev	Log message	Author	Age	Path
74	add module oc8051_wb_iinterface	simont	7922d 13h	/8051/tags/rel_1/bench/
68	add instruction cache and DELAY parameters for external ram, rom	simont	7926d 16h	/8051/tags/rel_1/bench/
59	add external rom	simont	7933d 10h	/8051/tags/rel_1/bench/
46	prepared header	simont	7950d 12h	/8051/tags/rel_1/bench/
37	added signals ack, stb and cyc	simont	7977d 14h	/8051/tags/rel_1/bench/
4	Code repaired to satisfy the linter; testbech fails	markom	7997d 18h	/8051/tags/rel_1/bench/
2	Initial CVS import	simont	8013d 16h	/8051/tags/rel_1/bench/