URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_1/] [sim/] [rtl_sim/] [run/] - Rev 186

Rev	Log message	Author	Age	Path
186		root	5565d 03h	/8051/tags/rel_1/sim/rtl_sim/run/
185		root	5621d 04h	/8051/tags/rel_1/sim/rtl_sim/run/
147	This commit was manufactured by cvs2svn to create tag 'rel_1'.		7750d 02h	/8051/tags/rel_1/sim/rtl_sim/run/
106	generic_dpram used	simont	7790d 02h	/8051/tags/rel_1/sim/rtl_sim/run/
101	initial inport	simont	7790d 07h	/8051/tags/rel_1/sim/rtl_sim/run/
100	use \	simont	7790d 07h	/8051/tags/rel_1/sim/rtl_sim/run/
85	prepare bugs	simont	7861d 05h	/8051/tags/rel_1/sim/rtl_sim/run/
83	replace some modules	simont	7869d 04h	/8051/tags/rel_1/sim/rtl_sim/run/
82	replace some modules	simont	7869d 04h	/8051/tags/rel_1/sim/rtl_sim/run/
66	added xrom_test	simont	7951d 01h	/8051/tags/rel_1/sim/rtl_sim/run/
65	add oc8051_icache and oc8051_cache_ram	simont	7951d 02h	/8051/tags/rel_1/sim/rtl_sim/run/
58	add external rom testing	simont	7957d 00h	/8051/tags/rel_1/sim/rtl_sim/run/
57	add module oc8051_xrom	simont	7957d 00h	/8051/tags/rel_1/sim/rtl_sim/run/
41	remove unused files	simont	7974d 03h	/8051/tags/rel_1/sim/rtl_sim/run/
4	Code repaired to satisfy the linter; testbech fails	markom	8021d 07h	/8051/tags/rel_1/sim/rtl_sim/run/
2	Initial CVS import	simont	8037d 05h	/8051/tags/rel_1/sim/rtl_sim/run/