URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_12/] [syn/] [src/] [verilog/] - Rev 182

Rev	Log message	Author	Age	Path
182	This commit was manufactured by cvs2svn to create tag 'rel_12'.		7709d 00h	/8051/tags/rel_12/syn/src/verilog/
71	add cache	simont	7959d 07h	/8051/tags/rel_12/syn/src/verilog/
70	initial import	simont	7959d 07h	/8051/tags/rel_12/syn/src/verilog/
46	prepared header	simont	7983d 04h	/8051/tags/rel_12/syn/src/verilog/
41	remove unused files	simont	7983d 07h	/8051/tags/rel_12/syn/src/verilog/
39	added signals ack, stb and cyc	simont	8010d 07h	/8051/tags/rel_12/syn/src/verilog/
19	combinatorial loop removed	simont	8024d 03h	/8051/tags/rel_12/syn/src/verilog/
14	added signal ea_int	simont	8027d 10h	/8051/tags/rel_12/syn/src/verilog/
2	Initial CVS import	simont	8046d 09h	/8051/tags/rel_12/syn/src/verilog/