URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_19/] [bench/] - Rev 68

Rev	Log message	Author	Age	Path
68	add instruction cache and DELAY parameters for external ram, rom	simont	7946d 03h	/8051/tags/rel_19/bench/
59	add external rom	simont	7952d 22h	/8051/tags/rel_19/bench/
46	prepared header	simont	7969d 23h	/8051/tags/rel_19/bench/
37	added signals ack, stb and cyc	simont	7997d 02h	/8051/tags/rel_19/bench/
4	Code repaired to satisfy the linter; testbech fails	markom	8017d 06h	/8051/tags/rel_19/bench/
2	Initial CVS import	simont	8033d 03h	/8051/tags/rel_19/bench/