URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2/] - Rev 27

Rev	Log message	Author	Age	Path
27	fix some bugs	simont	7988d 11h	/8051/tags/rel_2/
26	main divider logic was optimized not optimized by compiler, so I did it by hand	markom	7988d 13h	/8051/tags/rel_2/
25	divider and multiplier pass test	markom	7989d 07h	/8051/tags/rel_2/
24	intensively tests all instructions	markom	7989d 12h	/8051/tags/rel_2/
23	mul & div use 4 clocks	simont	7990d 03h	/8051/tags/rel_2/
22	fix some bugs	simont	7990d 03h	/8051/tags/rel_2/
21	mul bug fixed	markom	7990d 08h	/8051/tags/rel_2/
20	multiplier and divider changed so they complete in 4 cycles	markom	7990d 10h	/8051/tags/rel_2/
19	combinatorial loop removed	simont	7991d 03h	/8051/tags/rel_2/
18	rst signal added	simont	7994d 08h	/8051/tags/rel_2/
17	fix some bugs	simont	7994d 08h	/8051/tags/rel_2/
16	inputs ram and op2 removed	simont	7994d 08h	/8051/tags/rel_2/
15	commbinatorial loop removed	simont	7994d 08h	/8051/tags/rel_2/
14	added signal ea_int	simont	7994d 09h	/8051/tags/rel_2/
13	some bug fix	simont	7995d 06h	/8051/tags/rel_2/
12	des1_r in alu port list	simont	7995d 06h	/8051/tags/rel_2/
11	des2_r removed	simont	7995d 06h	/8051/tags/rel_2/
10	% replaced with ^ in uart; some minor improvements	markom	7995d 12h	/8051/tags/rel_2/
9	removed unused compare states	markom	7997d 05h	/8051/tags/rel_2/
8	some IDS optimizations	markom	7997d 05h	/8051/tags/rel_2/