URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2/] [rtl/] - Rev 67

Rev	Log message	Author	Age	Path
67	add parameters for instruction cache	simont	7934d 00h	/8051/tags/rel_2/rtl/
62	fix bugs in instruction interface	simont	7934d 21h	/8051/tags/rel_2/rtl/
54	cahnge interface to instruction rom	simont	7940d 19h	/8051/tags/rel_2/rtl/
47	remove unused files	simont	7957d 20h	/8051/tags/rel_2/rtl/
46	prepared header	simont	7957d 20h	/8051/tags/rel_2/rtl/
45	prepared header	simont	7957d 20h	/8051/tags/rel_2/rtl/
44	prepared header	simont	7957d 21h	/8051/tags/rel_2/rtl/
41	remove unused files	simont	7957d 22h	/8051/tags/rel_2/rtl/
40	added sigals for interacting with external ram	simont	7978d 00h	/8051/tags/rel_2/rtl/
38	fix some bugs	simont	7984d 22h	/8051/tags/rel_2/rtl/
37	added signals ack, stb and cyc	simont	7984d 23h	/8051/tags/rel_2/rtl/
36	fix bugs in mode 0	simont	7984d 23h	/8051/tags/rel_2/rtl/
32	overflow repaired	simont	7986d 03h	/8051/tags/rel_2/rtl/
31	fix some bugs	simont	7992d 19h	/8051/tags/rel_2/rtl/
30	mode 1 and 3 divide clooak with 31 or 16, mode 2 with 64 or 32	simont	7996d 02h	/8051/tags/rel_2/rtl/
29	fix some bugs	simont	7996d 02h	/8051/tags/rel_2/rtl/
28	remove syn signal	simont	7996d 03h	/8051/tags/rel_2/rtl/
27	fix some bugs	simont	7996d 03h	/8051/tags/rel_2/rtl/
26	main divider logic was optimized not optimized by compiler, so I did it by hand	markom	7996d 05h	/8051/tags/rel_2/rtl/
25	divider and multiplier pass test	markom	7996d 23h	/8051/tags/rel_2/rtl/