URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [trunk/] - Rev 98

Rev	Log message	Author	Age	Path
98	move to rtl/verilog	simont	7798d 11h	/8051/trunk/
97	initial inport	simont	7798d 12h	/8051/trunk/
96	initial import	simont	7798d 12h	/8051/trunk/
95	updating...	simont	7798d 12h	/8051/trunk/
94	fix bug.	simont	7798d 12h	/8051/trunk/
93	OC8051_XILINX_RAM added	simont	7798d 12h	/8051/trunk/
92	initial inport	simont	7798d 12h	/8051/trunk/
91	* empty log message *	simont	7798d 12h	/8051/trunk/
90	change module name.	simont	7803d 05h	/8051/trunk/
89	Replaced oc8051_ram by generic_dpram.	rherveille	7864d 09h	/8051/trunk/
88	fix bugs	simont	7869d 09h	/8051/trunk/
87	add include oc8051_defines.v	simont	7869d 09h	/8051/trunk/
86	initial input	simont	7869d 10h	/8051/trunk/
85	prepare bugs	simont	7869d 10h	/8051/trunk/
84	remove wb_bus_mon	simont	7877d 09h	/8051/trunk/
83	replace some modules	simont	7877d 09h	/8051/trunk/
82	replace some modules	simont	7877d 09h	/8051/trunk/
81	initial import	simont	7877d 09h	/8051/trunk/
80	removing unused modules	simont	7877d 09h	/8051/trunk/
79	initial import	simont	7877d 09h	/8051/trunk/