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URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [trunk/] [rtl/] - Rev 31

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Rev Log message Author Age Path
31 fix some bugs simont 7990d 01h /8051/trunk/rtl/
30 mode 1 and 3 divide clooak with 31 or 16, mode 2 with 64 or 32 simont 7993d 08h /8051/trunk/rtl/
29 fix some bugs simont 7993d 08h /8051/trunk/rtl/
28 remove syn signal simont 7993d 09h /8051/trunk/rtl/
27 fix some bugs simont 7993d 09h /8051/trunk/rtl/
26 main divider logic was optimized not optimized by compiler, so I did it by hand markom 7993d 11h /8051/trunk/rtl/
25 divider and multiplier pass test markom 7994d 05h /8051/trunk/rtl/
23 mul & div use 4 clocks simont 7995d 00h /8051/trunk/rtl/
22 fix some bugs simont 7995d 00h /8051/trunk/rtl/
21 mul bug fixed markom 7995d 06h /8051/trunk/rtl/
20 multiplier and divider changed so they complete in 4 cycles markom 7995d 08h /8051/trunk/rtl/
19 combinatorial loop removed simont 7996d 01h /8051/trunk/rtl/
17 fix some bugs simont 7999d 06h /8051/trunk/rtl/
16 inputs ram and op2 removed simont 7999d 06h /8051/trunk/rtl/
15 commbinatorial loop removed simont 7999d 06h /8051/trunk/rtl/
13 some bug fix simont 8000d 04h /8051/trunk/rtl/
12 des1_r in alu port list simont 8000d 04h /8051/trunk/rtl/
11 des2_r removed simont 8000d 04h /8051/trunk/rtl/
10 % replaced with ^ in uart; some minor improvements markom 8000d 10h /8051/trunk/rtl/
9 removed unused compare states markom 8002d 03h /8051/trunk/rtl/

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