OpenCores
URL https://opencores.org/ocsvn/RISCMCU/RISCMCU/trunk

Subversion Repositories RISCMCU

[/] [RISCMCU/] [trunk/] [simulation/] - Rev 28

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
28 New directory structure. root 5566d 21h /RISCMCU/trunk/simulation/
23 A demo of MAX+plus II .scf simulation file
The waveform shows how the MCU output 3, 2 and 1 to port B, port C and port D using different instructions.
yapzihe 8004d 19h /trunk/simulation/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.