OpenCores
URL https://opencores.org/ocsvn/RISCMCU/RISCMCU/trunk

Subversion Repositories RISCMCU

[/] [RISCMCU/] [trunk/] [vhdl/] - Rev 28

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
28 New directory structure. root 5581d 08h /RISCMCU/trunk/vhdl/
24 refer to counter.asm and counter.lst in the asm directory yapzihe 8019d 06h /trunk/vhdl/
20 a simple demo program that output 3, 2, 1 to port b, c and d with different way. yapzihe 8019d 06h /trunk/vhdl/
19 1. Remove the use of frequency divider
2. Uses the same external interrupt pin and timer external clock source pin as AT90S1200
3. Adds some comments to each module instantation.
yapzihe 8021d 03h /trunk/vhdl/
8 move all the VHDL files to here from 'RISCMCU' directory yapzihe 8036d 04h /trunk/vhdl/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.