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Rev Log message Author Age Path
191 New directory structure. root 5718d 21h /aemb/branches/AEMB2_712/
77 This commit was manufactured by cvs2svn to create branch 'AEMB2_712'. 6176d 21h /branches/AEMB2_712/
76 initial sybreon 6176d 21h /trunk/
74 Minor code cleanup. sybreon 6183d 23h /trunk/
73 Moved simulation kernel into code. sybreon 6183d 23h /trunk/
72 Minor code cleanup. sybreon 6183d 23h /trunk/
71 Old version deprecated. sybreon 6191d 02h /trunk/
70 Change interrupt to positive level triggered interrupts. sybreon 6192d 01h /trunk/
69 Removed unnecessary byte acrobatics with VMEM data. sybreon 6193d 21h /trunk/
68 Generate VMEM instead of HEX dumps of programme. sybreon 6193d 21h /trunk/
67 Minor simulation fixes. sybreon 6195d 20h /trunk/
66 Added fsl_tag_o to FSL bus (tag either address or data). sybreon 6197d 18h /trunk/
65 Fixed minor typo causing synthesis failure. sybreon 6199d 07h /trunk/
64 Fixed minor interrupt test typo. sybreon 6199d 16h /trunk/
63 Fixed interrupt signal synchronisation. sybreon 6199d 16h /trunk/
62 Fixed minor typo. sybreon 6199d 17h /trunk/
61 Changed interrupt handling system (reported by M. Ettus). sybreon 6199d 18h /trunk/
60 Added interrupt test routine. sybreon 6199d 18h /trunk/
59 Added posedge/negedge bus interface.
Modified interrupt test system.
sybreon 6199d 18h /trunk/
58 Updated simulation to also check BRI 0x00 instruction. sybreon 6200d 16h /trunk/

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