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Rev Log message Author Age Path
191 New directory structure. root 5586d 02h /aemb/branches/AEMB2_712/rtl/
77 This commit was manufactured by cvs2svn to create branch 'AEMB2_712'. 6044d 02h /aemb/branches/AEMB2_712/rtl/
76 initial sybreon 6044d 02h /aemb/branches/AEMB2_712/rtl/
73 Moved simulation kernel into code. sybreon 6051d 04h /aemb/branches/AEMB2_712/rtl/
72 Minor code cleanup. sybreon 6051d 04h /aemb/branches/AEMB2_712/rtl/
71 Old version deprecated. sybreon 6058d 07h /aemb/branches/AEMB2_712/rtl/
70 Change interrupt to positive level triggered interrupts. sybreon 6059d 06h /aemb/branches/AEMB2_712/rtl/
66 Added fsl_tag_o to FSL bus (tag either address or data). sybreon 6064d 23h /aemb/branches/AEMB2_712/rtl/
65 Fixed minor typo causing synthesis failure. sybreon 6066d 11h /aemb/branches/AEMB2_712/rtl/
63 Fixed interrupt signal synchronisation. sybreon 6066d 21h /aemb/branches/AEMB2_712/rtl/
62 Fixed minor typo. sybreon 6066d 22h /aemb/branches/AEMB2_712/rtl/
61 Changed interrupt handling system (reported by M. Ettus). sybreon 6066d 23h /aemb/branches/AEMB2_712/rtl/
56 Parameterised optional components into aeMB_xecu.v sybreon 6070d 21h /aemb/branches/AEMB2_712/rtl/
55 Upgraded license to LGPLv3.
Significant performance optimisations.		 sybreon 6071d 04h /aemb/branches/AEMB2_712/rtl/
53 Added GET/PUT support through a FSL bus. sybreon 6072d 00h /aemb/branches/AEMB2_712/rtl/
51 Fixed data WISHBONE arbitration problem (reported by J Lee). sybreon 6073d 03h /aemb/branches/AEMB2_712/rtl/
50 Parameterised optional components. sybreon 6073d 07h /aemb/branches/AEMB2_712/rtl/
48 Fixed spurious interrupt latching during long bus cycles (spotted by J Lee). sybreon 6077d 15h /aemb/branches/AEMB2_712/rtl/
45 Minor code cleanup. sybreon 6078d 12h /aemb/branches/AEMB2_712/rtl/
44 Added better (beta) interrupt support.
Changed MSR_IE to disabled at reset as per MB docs.		 sybreon 6079d 02h /aemb/branches/AEMB2_712/rtl/

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