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[/] [aemb/] [branches/] [AEMB2_712/] [sim/] - Rev 39

Rev	Log message	Author	Age	Path
39	Made some changes to the interrupt control. In some cases, the interrupt logic waits forever and doesn't execute. Bug was discovered by M. Ettus.	sybreon	6130d 00h	/aemb/branches/AEMB2_712/sim/
38	Added interrupt support.	sybreon	6275d 01h	/aemb/branches/AEMB2_712/sim/
31	Removed byte acrobatics.	sybreon	6305d 03h	/aemb/branches/AEMB2_712/sim/
30	Minor updates as sw/c/aeMB_testbench.c got updated.	sybreon	6308d 04h	/aemb/branches/AEMB2_712/sim/
22	Added support for 8-bit and 16-bit data types.	sybreon	6309d 21h	/aemb/branches/AEMB2_712/sim/
19	Added initial unified memory core.	sybreon	6322d 06h	/aemb/branches/AEMB2_712/sim/
18	Moved testbench into /sim/verilog. Simulation cleanups.	sybreon	6322d 23h	/aemb/branches/AEMB2_712/sim/
15	Removed ROM file. Please generate it from the SW directory.	sybreon	6331d 05h	/aemb/branches/AEMB2_712/sim/
13	Fibonacci rom	sybreon	6331d 13h	/aemb/branches/AEMB2_712/sim/
2	initial import	sybreon	6357d 02h	/aemb/branches/AEMB2_712/sim/